Analysis of the Substrate Noise Effects for DC-DC Converter Integration in a 0

نویسندگان

  • R. M. VINELLA
  • R. ANTONICELLI
  • M. RIZZI
  • B. CASTAGNOLO
چکیده

Substrate noise effects caused by the integration of a DC-DC converter into a 0.13 μm CMOS technology integrated circuit are investigated in this paper. Simulations performed using the Substrate Noise Analyst tool show strong impact of switching and power supply noise on a sensitive analog block. The dependence of substrate noise coupling on physical separation distance, floorplanning and introduction of guarding structures has been investigated. Simulation results highlight great efficiency of p+ guard rings closer to and surrounding sensitive nodes. Modelling of guarding structures in sub-micron technologies is mandatory to prevent noise coupling during the design stage. Key-Words: Substrate noise coupling, substrate characterization, DC-DC converter, isolation strategies, guardring.

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تاریخ انتشار 2006